SiC MOSFET vs SiC/Si Cascode short circuit robustness benchmark

被引：11

作者：

Marroqui, D. ^{[1
]}

Garrigos, A. ^{[1
]}

Blanes, J. M. ^{[1
]}

Gutierrez, R. ^{[1
]}

Maset, E. ^{[2
]}

Iannuzzo, F. ^{[3
]}

机构：

[1] Miguel Hernandez Univ Elche, IE G, Elche, Spain

[2] Univ Valencia, Instrumentat & Ind Elect Lab LELL, Valencia, Spain

[3] Aalborg Univ, Ctr Reliable Power Elect CORPE, Aalborg, Denmark

来源：

MICROELECTRONICS RELIABILITY | 2019年 / 100卷

关键词：

ISSUES;

D O I：

10.1016/j.microrel.2019.113429

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Nowadays, MOSFET SiC semiconductors short circuit capability is a key issue. SiC/Si Cascodes are compound semiconductors that, in some aspects, show a similar MOSFET behaviour. No interlayer dielectric insulation suggests, in theory, Cascode JFETs as more robust devices. The purpose of this paper is to compare the drift and degradation of two commercial devices static parameters by exposing them to different levels of repetitive 1.5 mu s short-circuit campaigns at 85% of its breakdown voltage. Short-circuit time has been set experimentally, and longer times result in catastrophic failure of MOSFET devices due to over self-heating. For this purpose, pre- and post-test short circuit characterizations are presented.

引用

页数：6

共 12 条

[1] Saturation Current and On-Resistance Correlation during During Repetitive Short-Circuit Conditions on SiC JFET Transistors [J].