Compact modular expandable analog defuzzifiers using multiple-input floating gate transistor transconductance multipliers

被引:0
|
作者
Ramírez-Angulo, J [1 ]
Choi, SC [1 ]
Zrilic, J [1 ]
机构
[1] New Mexico State Univ, Las Cruces, NM 88003 USA
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暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
An implementation of a low-voltage analog defuzzifier module is introduced. It employs low distortion, very compact analog multipliers with multiple-input floating gate transistors. Experimental and simulation results from a test chip verify the proposed scheme. The total harmonic distortion of the multiplier is less than 0.1% and its silicon area is only 180x150 mu m(2) in 2 mu m CMOS technology. Orbit 2um low-noise N-well MOSIS fabrication technology has been used for the fabrication of test chip prototypes. A new scheme for the modular expansion of analog defuzzifiers with arbitrary number of rules and outputs variables is presented.
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页码:381 / 384
页数:4
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