Design Considerations for High Efficiency Buck PFC with Half-Bridge Regulation Stage

被引:16
作者
Keogh, Bernard [1 ]
Young, George [1 ]
Wegner, Hagen [1 ]
Gillmor, Colin [1 ]
机构
[1] Texas Instruments Cork Ltd, Power Supply Control, Cork, Ireland
来源
2010 TWENTY-FIFTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC) | 2010年
关键词
D O I
10.1109/APEC.2010.5433410
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
AC-DC converters for applications such as notebook adapters require operation over universal input mains range, and are challenged to achieve high efficiency over the entire range. Given the enclosed construction, and the demand for smaller, thinner adapters, they must be designed for high, yet relatively flat efficiency over the full mains range, to meet stringent thermal constraints. A novel two-stage architecture has been developed for high density, high efficiency notebook adapters. A buck regulator is used for the PFC front-end stage. The output isolation & regulation stage is implemented using a Half-Bridge topology operated in an Integral-Cycle-Controlled mode. Smart burst modes are deployed in both stages, delivering excellent efficiency also across the full load range - 93% efficiency at 100% loading, and >80% efficiency at 5% loading. The Buck PFC delivers Power Factor performance that greatly exceeds EN61000-3-2 & meets Energy Star requirements, with Power Factor >0.93 at 115Vac (low line). This paper details the design approach, practical issues and their resolutions, and benefits of the approach. Performance data is presented.
引用
收藏
页码:1384 / 1391
页数:8
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