Fast FPGA placement Algorithm using Quantum Genetic Algorithm with Simulated Annealing

被引:2
|
作者
Guo, Xiao [1 ]
Wang, Teng [1 ]
Chen, Zhihui [1 ]
Wang, Lingli [1 ]
Zhao, Wenqing [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
关键词
FPGA placement; QGASA; path-timing driven; congestion-avoidance;
D O I
10.1109/ASICON.2009.5351309
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Field-Programmable Gate Array (FPGA) attracts more and more attentions in the digital-design field for its excellent features such as reconfiguration and fast time to market. But the implementation of FPGA is restricted by its hardware framework and the CAD software. This paper proposes Quantum Genetic Algorithm with Simulated Annealing (QGASA) as a hybrid FPGA placement algorithm, which combined the advantage of the fast global search ability of QGA and local adjusting ability of Simulated Annealing (SA) algorithm. The experimental results are compared with the state-of-the-art placement tool Versatile Place and Route (VPR) by running the MCNC benchmark circuits. The results show that the path-timing driven cost of QGASA is similar to VPR, but the overall CPU time is reduced by 70%.
引用
收藏
页码:730 / 733
页数:4
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