High speed digital smart image sensor with image compression function

被引:3
作者
Narisawa, S [1 ]
Masuda, K [1 ]
Hamamoto, T [1 ]
机构
[1] Sci Univ Tokyo, Fac Engn, Dept Elect Engn, Tokyo 162, Japan
来源
PROCEEDINGS OF 2004 IEEE ASIA-PACIFIC CONFERENCE ON ADVANCED SYSTEM INTEGRATED CIRCUITS | 2004年
关键词
D O I
10.1109/APASIC.2004.1349426
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We propose a high speed digital smart image sensor on which A/D conversion circuits and digital processing circuits of image compression are integrated. By on-sensor image compression, the proposed sensor can overcome a communication bottle neck between a sensor and peripherals that is one of the most serious problems for achieving high frame rates. The compression method uses the correlation between two consecutive frames. It has some compression modes by controlling spatial and temporal resolutions. In this paper, the algorithm of on-sensor-compression is explained and some experimental results are shown. finally, we show the design of new digital smart sensor.
引用
收藏
页码:128 / 131
页数:4
相关论文
共 2 条
[1]  
ALLEN PE, CMOS ANALOG CIRCUIT, P672
[2]  
ENOMOTO T, 2003, VIDEO IMAGE LSI SYST