Critical Design Considerations for Static and Dynamic Performances on 6.5 kV 4H-SiC MOSFETs Fabricated in a 6-inch SiC Foundry

6.5 kV-rated 4H-SiC MOSFETs have been successfully fabricated and demonstrated on 60 gm-thick, 1.2x10(15) cm(-3) doped N-type epi-layer on 6-inch, 4H-SiC N+ substrates. Devices were fabricated at the 6-inch SiC foundry, X-FAB, TX, USA. Active and edge termination areas of high voltage (>3.3 kV) SiC devices require critical design consideration due to implant straggles from the low background doping concentration. Despite the fabrication and design challenges, we have demonstrated R-on,(sp) of 47 mu-cm 2 with a breakdown voltage of 7.9 kV with a very low leakage current using ring-based edge termination structure. Devices were then diced and packaged in a SUNY Poly's custom-made package to evaluate short circuit capabilities. Short circuit withstand time of 6.2 mu s was recorded from the nominal device, along with 7 mu s and 13 mu s from the device with narrower JFET width and wider channel length, respectively.