A 0.5V 2.2pW 2-Transistor Voltage Reference

被引：0

作者：

Seok, Mingoo ^{[1
]}

Kim, Gyouho ^{[1
]}

Sylvester, Dennis ^{[1
]}

Blaauw, David ^{[1
]}

机构：

[1] Univ Michigan, Ann Arbor, MI 48109 USA

来源：

PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2009年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A voltage reference using a depletion-mode device is designed in a 0.13 mu m CMOS process and achieves ultra-low power consumption and sub-1V operation without sacrificing temperature and supply voltage insensitivity. Measurements show a temperature coefficient of 19.4ppm/degrees C (3.4 mu V/degrees C), line sensitivity of 0.033%/V, power supply rejection ratio of - 67dB, and power consumption of 2.2pW. It requires only two devices and functions down to V-dd=0.5V with an area of 1350 mu m(2). A variant for higher V-out is also demonstrated.

引用

页码：577 / 580

页数：4

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