A Sampling Decision System for Virtual Metrology in Semiconductor Manufacturing

被引:20
|
作者
Kurz, Daniel [1 ]
De Luca, Cristina [2 ]
Pilz, Juergen [1 ]
机构
[1] Univ Klagenfurt, Dept Stat, A-9020 Klagenfurt, Austria
[2] Infineon Technol Austria AG, A-9500 Villach, Austria
关键词
Bayesian modeling; control charts; decision theory; sampling design; virtual metrology; PREDICTING CVD THICKNESS; INFERENCE; SCHEME;
D O I
10.1109/TASE.2014.2360214
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In semiconductor manufacturing, metrology operations are expensive and time-consuming, for this reason only a certain sample of wafers is measured. With the need of highly reliable processes, the semiconductor industry aims at developing methodologies covering the gap of missing metrology information. Virtual Metrology turns out to be a promising method; it aims at predicting wafer and/or site fine metrology results in real time and free of costs. In this paper, we present a sampling decision system that relies on virtual measurements suggesting an efficient strategy for measuring productive wafers. Several methods for evaluating when a real measurement is needed (including the expected utility of measurement information, a two-stage sampling decision model and wafer quality risk values) are proposed. We further provide ideas on how to assess and update the reliability of the virtual measurements in a sampling decision system (whenever real measurements become available). In this context, we introduce equipment health factors and virtual trust factors for improving the reliability of the sampling decision system. Finally, the performance of the sampling decision system is demonstrated on a set of virtual and real metrology data from the semiconductor industry. It is shown that wafer measurements are efficiently performed when really needed. Note to Practitioners-Classically, the status of some process is controlled by means of physical measurements, which are only performed within certain intervals of time. In this way, there might be delays in the detection of process abnormalities. Moreover, the classical measurement rules are typically of a statical nature (i.e., the measurement policy is not adapted to current production conditions). In this paper, we propose a new sampling design based on virtual measurements, which are predictions on the location of the real measurements in the control chart depending on the status of the equipment while processing. With the availability of virtual measurements for every wafer, the status of the process can be steadily controlled and process deviations can be realized earlier. Moreover, the usage of virtual measurements allows for adapting the measurement policy to current process conditions. Whenever process abnormalities are signalized by the virtual measurement, a physical measurement needs to be triggered. Therefore, physical metrology operations can be scheduled in a more efficient way.
引用
收藏
页码:75 / 83
页数:9
相关论文
共 50 条
  • [1] A virtual metrology system for semiconductor manufacturing
    Kang, Pilsung
    Lee, Hyoung-joo
    Cho, Sungzoon
    Kim, Dongil
    Park, Jinwoo
    Park, Chan-Kyoo
    Doh, Seungyong
    EXPERT SYSTEMS WITH APPLICATIONS, 2009, 36 (10) : 12554 - 12561
  • [2] An intelligent virtual metrology system with adaptive update for semiconductor manufacturing
    Kang, Seokho
    Kang, Pilsung
    JOURNAL OF PROCESS CONTROL, 2017, 52 : 66 - 74
  • [3] Virtual metrology in semiconductor manufacturing: Current status and future prospects
    Maitra, Varad
    Su, Yutai
    Shi, Jing
    EXPERT SYSTEMS WITH APPLICATIONS, 2024, 249
  • [4] Multitask learning for virtual metrology in semiconductor manufacturing systems
    Park, Chanhee
    Kim, Younghoon
    Park, Youngjoon
    Kim, Seoung Bum
    COMPUTERS & INDUSTRIAL ENGINEERING, 2018, 123 : 209 - 219
  • [5] The Implementation of a Smart Sampling Scheme C2O Utilizing Virtual Metrology in Semiconductor Manufacturing
    Tin, Tze Chiang
    Tan, Saw Chin
    Yong, Hing
    Kim, Jimmy Ook Hyun
    Teo, Eric Ken Yong
    Wong, Joanne Ching Yee
    Lee, Ching Kwang
    Than, Peter
    Tan, Angela Pei San
    Phang, Siew Chee
    IEEE ACCESS, 2021, 9 : 114255 - 114266
  • [6] A Realizable Overlay Virtual Metrology System in Semiconductor Manufacturing: Proposal, Challenges and Future Perspective
    Tin, Tze Chiang
    Tan, Saw Chin
    Yong, Hing
    Kim, Jimmy Ook Hyun
    Teo, Eric Ken Yong
    Lee, Ching Kwang
    Than, Peter
    Tan, Angela Pei San
    Phang, Siew Chee
    IEEE ACCESS, 2021, 9 (09): : 65418 - 65439
  • [7] A virtual metrology scheme for predicting CVD thickness in semiconductor manufacturing
    Lin, Tung-Ho
    Hung, Ming-Hsiung
    Lin, Rung-Chuan
    Cheng, Fan-Tien
    2006 IEEE INTERNATIONAL CONFERENCE ON ROBOTICS AND AUTOMATION (ICRA), VOLS 1-10, 2006, : 1054 - 1059
  • [8] STRUCTURED REGULARIZATION MODELING FOR VIRTUAL METROLOGY IN SEMICONDUCTOR MANUFACTURING PROCESSES
    Park, Chanhee
    Park, Sung Ho
    Kim, Seoung Bum
    INTERNATIONAL JOURNAL OF INDUSTRIAL ENGINEERING-THEORY APPLICATIONS AND PRACTICE, 2019, 26 (06): : 835 - 849
  • [9] Virtual Metrology and Run-to-Run Control in Semiconductor Manufacturing
    Zhu, Y.
    Baseman, R. J.
    He, J.
    Restaino, D. D.
    Yashchin, E.
    PROCEEDINGS 18TH ISSAT INTERNATIONAL CONFERENCE ON RELIABILITY & QUALITY IN DESIGN, 2012, : 374 - +
  • [10] Virtual metrology for run-to-run control in semiconductor manufacturing
    Kang, Pilsung
    Kim, Dongil
    Lee, Hyoung-joo
    Doh, Seungyong
    Cho, Sungzoon
    EXPERT SYSTEMS WITH APPLICATIONS, 2011, 38 (03) : 2508 - 2522