Ultra-Wideband Switched-Capacitor Delays and Circulators-Theory and Implementation

被引:18
作者
Nagulu, Aravind [1 ]
Mekkawy, Ahmed [2 ]
Tymchenko, Mykhailo [3 ]
Sounas, Dimitrios [4 ]
Alu, Andrea [2 ,3 ,5 ]
Krishnaswamy, Harish [1 ]
机构
[1] Columbia Univ, Dept Elect Engn, New York, NY 10025 USA
[2] CUNY, Adv Sci Res Ctr, Photon Initiat, New York, NY 10031 USA
[3] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
[4] Wayne State Univ, Dept Elect Engn, Detroit, MI 48202 USA
[5] CUNY, Grad Ctr, Phys Program, New York, NY 10031 USA
基金
美国国家科学基金会;
关键词
Circulators; CMOS; full duplex; gyrators; isolators; linear periodically time-varying (LPTV) circuits; non-reciprocity; radars; true-time delays (TTD); ultra-wideband (UWB); TRUE-TIME-DELAY; CMOS CIRCULATOR; ANTENNA; POWER; LIMITATIONS; AMPLIFIER; ISOLATORS; DESIGN; CELL;
D O I
10.1109/JSSC.2021.3055230
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Recent research has revealed the possibility to achieve non-magnetic non-reciprocity using time variance. However, prior CMOS-based circulators rely on the interference between non-reciprocal switched-capacitor/transmission-line gyrators and reciprocal transmission-line rings, which increases form factor and restricts frequency tunability and bandwidth (BW). On the other hand, our recent work on quasi-electrostatic wave propagation in switched-capacitor networks has proposed a new regime in multipath switched-capacitor network operation that enables an ultra-broadband, ultra-compact reciprocal/non-reciprocal true-time-delay element. In this work, we corroborate these findings by implementing prototype devices of the quasi-electrostatic delay element. Our measurements of the delay element reveal that delays of tens of nanoseconds over hundreds of MHz BW are realizable on-chip in a compact form factor. In addition, we apply synthetic rotation across these switched-capacitor networks to realize an ultra-broadband N-port circulator with ultra-compact form factor. We implemented a wideband three-port circulator showcasing this new architecture in a standard 65-nm CMOS process. The circulator exhibits symmetric performance across all three ports and dc-1-GHz operation for a modulation frequency of 500 MHz. The measured transmission losses of the circulator range between 3.1 and 4.3 dB, matching is <-15 dB, isolation is >18 dB, and noise figure (NF) is consistent with the insertion loss. This device occupies an area of 0.19 mm2 (lambda(2)(center)/1.9 x 10(6)), representing about 100-1000x higher miniaturization compared to the prior art.
引用
收藏
页码:1412 / 1424
页数:13
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