Microprocessor Testing: Functional Meets Structural Test

被引:4
作者
Touati, A. [1 ]
Bosio, A. [1 ]
Girard, P. [1 ]
Virazel, A. [1 ]
Bernardi, P. [1 ]
Reorda, M. Sonza [1 ]
机构
[1] CNRS, UM, LIRMM, 161 Rue Ada, F-34095 Montpellier, France
关键词
Microprocessor test; SBST; functional and structural test; delay test; test compaction; ATPG;
D O I
10.1142/S0218126617400072
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Structural test is widely adopted to ensure high quality for a given product. The availability of many commercial tools and the use of fault models make it very easy to generate and to evaluate. Despite its efficiency, structural test is also known for the risk of over-testing that may lead to yield loss. This problem is mainly due to the fact that structural test does not take into account the functionality of the circuit under test. On the other hand, functional test guarantees that the circuit is tested under normal conditions, thus avoiding any over-as well as under-testing issues. More in particular, for microprocessor testing, functional test is usually applied by exploiting the Software-Based-Self-Test (SBST) technique. SBST applies a set of functional test programs that are executed by the processor to achieve a given fault coverage. SBST fits particularly well for online testing of processor-based systems. In this work, we describe a technique able to execute functional test programs as if they were structural tests. In this way, they can be applied during the end-of-production test in order to achieve good fault coverage and, at the same time, avoiding any over-test problems. We will show that it is possible to map functional test programs into the classical structural test schemes, so that their application simply requires the presence of a scan chain. Finally, we present a compaction algorithm able to significantly reduce the test length. Results carried out on two different microprocessors show the advantages of such approach.
引用
收藏
页数:18
相关论文
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