Interrupt driven parallel processing

被引：0

作者：

Drotos, Daniel ^{[1
]}

Vasarhelyi, Jozsef ^{[1
]}

机构：

[1] Univ Miskolc, Inst Automat & Infocommun, Miskolc, Hungary

来源：

2019 20TH INTERNATIONAL CARPATHIAN CONTROL CONFERENCE (ICCC) | 2019年

关键词：

embedded system; FPGA; soft-processor; interrupt service routine; parallel processing; multichannel memory;

D O I：

10.1109/carpathiancc.2019.8765909

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This article explores the possibilities of new computation architecture. The paper tries to present some modifications in multiprocessor architectures in order to obtain performance increase in computation speed by parallel memory access. In the presented example it is shown how an interrupt can be served skipping the interrupt service routine usual steps.

引用

页码：70 / 73

页数：4