Analysis and Implementation of an Interleaved ZVS DC-DC Converter

被引:0
|
作者
Lin, Bor-Ren [1 ,2 ]
Chiang, Huann-Keng [1 ]
Cheng, Chih-Yuan
机构
[1] Natl Yunlin Univ Sci & Technol, Dept Elect Engn, Yunlin, Taiwan
[2] Univ Missouri, Power Elect Res Ctr, Columbia, MO 65211 USA
关键词
Voltage Step-Up; Power Conversion; Power Electronics; DESIGN;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An interleaved zero voltage switching (ZVS) converter with less component count and boost voltage conversion ratio is presented. The output voltage doubler is used on the output side to achieve the boost type of voltage conversion ratio. The proposed converter includes two active-clamping converters with common clamp capacitor to share load current. By the shared capacitor, the charge balance of two interleaved parts is automatically regulated under input voltage and load variations. The ZVS turn-on of all switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the output capacitor. The proposed circuit has no large output inductor such that the adopted circuit has simpler structure, lower cost and no effective duty loss. The voltage stresses on output diodes are clamped at the output voltage. The circuit configuration, operation principles and design consideration are presented Finally experimental results bused on a 425W (170V/2.5A) prototype are provided to verify the effectiveness of the proposed converter. Copyright (C) 2010 Praise Worthy Prize S.r.l. - All rights reserved.
引用
收藏
页码:1 / 9
页数:9
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