A self-aligned process for high-voltage, short-channel vertical DMOSFETs in 4H-SiC

被引：73

作者：

Matin, M ^{[1
]}

Saha, A

Cooper, JA

机构：

[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA

[2] Purdue Univ, Birck Nanotechnol Ctr, W Lafayette, IN 47907 USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2004年 / 51卷 / 10期

关键词：

counter-doping; DMOS; high-voltage MOSFET; nitric oxide (NO) anneal; self-aligned; short-channel; SiC;

D O I：

10.1109/TED.2004.835622

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we describe a self-aligned process to produce short-channel vertical power DMOSFETs in 4H-SiC. By reducing the channel length to less than or equal to0.5 mum, the specific on-resistance of the MOSFET channel is proportionally reduced, significantly enhancing performance.

引用

页码：1721 / 1725

页数：5

共 10 条

[1] Surface roughening in ion implanted 4H-silicon carbide [J].

Capano, MA ;

Ryu, S ;

Cooper, JA ;

Melloch, MR ;

Rottner, K ;

Karlsson, S ;

Nordell, N ;

Powell, A ;

Walker, DE .

JOURNAL OF ELECTRONIC MATERIALS, 1999, 28 (03) :214-218

[2] Effect of nitric oxide annealing on the interface trap densities near the band edges in the 4H polytype of silicon carbide [J].

Chung, GY ;

Tin, CC ;

Williams, JR ;

McDonald, K ;

Di Ventra, M ;

Pantelides, ST ;

Feldman, LC ;

Weller, RA .

APPLIED PHYSICS LETTERS, 2000, 76 (13) :1713-1715

[3] Improved inversion channel mobility for 4H-SiC MOSFETs following high temperature anneals in nitric oxide [J].

Chung, GY ;

Tin, CC ;

Williams, JR ;

McDonald, K ;

Chanana, RK ;

Weller, RA ;

Pantelides, ST ;

Feldman, LC ;

Holland, OW ;

Das, MK ;

Palmour, JW .

IEEE ELECTRON DEVICE LETTERS, 2001, 22 (04) :176-178

[4] Effect of process variations and ambient temperature on electron mobility at the SiO2/4H-SiC interface [J].

Lu, CY ;

Cooper, JA ;

Tsuji, T ;

Chung, G ;

Williams, JR ;

McDonald, K ;

Feldman, LC .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (07) :1582-1588

[5] Self-aligned short-channel vertical power DMOSFETs in 4H-SiC [J].

Matin, M ;

Saha, A ;

Cooper, JA .

SILICON CARBIDE AND RELATED MATERIALS 2003, PRTS 1 AND 2, 2004, 457-460 :1393-1396

[6] Large-area (3.3 mm x 3.3 mm) power MOSFETs in 4H-SiC [J].

Ryu, SH ;

Agarwal, A ;

Richmond, J ;

Das, M ;

Lipkin, L ;

Palmour, J ;

Saks, N ;

Williams, J .

SILICON CARBIDE AND RELATED MATERIALS 2001, PTS 1 AND 2, PROCEEDINGS, 2002, 389-3 :1195-1198

[7] High-voltage double-implanted power MOSFET's in 6H-SiC [J].

Shenoy, JN ;

Cooper, JA ;

Melloch, MR .

IEEE ELECTRON DEVICE LETTERS, 1997, 18 (03) :93-95

[8] MODELING OF THE ON-RESISTANCE OF LDMOS, VDMOS, AND VMOS POWER TRANSISTORS [J].

SUN, SC ;

PLUMMER, JD .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (02) :356-367

[9]

TEMPLE VAK, 1977, IEDM, P423

[10]

UENO K, 2001, Patent No. 6238980

← 1 →