Hazard checking of timed asynchronous circuits revisited

被引:0
作者
Beal, Frederoc [1 ]
Yoneda, Tomohiro [2 ]
Myers, Chris J. [3 ]
机构
[1] Tokyo Inst Technol, Tokyo 152, Japan
[2] Natl Inst Informat, Tokyo, Japan
[3] Univ Utah, Salt Lake City, UT 84112 USA
来源
SEVENTH INTERNATIONAL CONFERENCE ON APPLICATION OF CONCURRENCY TO SYSTEM DESIGN, PROCEEDINGS | 2007年
关键词
D O I
10.1109/ACSD.2007.52
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper proposes a new approach for the hazard checking of timed asynchronous circuits. Previous papers proposed either exact algorithms, which suffer from state-space explosion, or efficient algorithms which use a (conservative) approximation to avoid state-space explosion but can result in the rejection of designs which are valid. In particular [7] presents a timed extention of the work in [1] which is very efficient but is not able to handle circuits with internal loops, which prevents its use in some cases. We propose a new approach to the problem in order to overcome the mentioned limitations, without sacrificing efficiency. To do so, we first introduce a general framework targeted at the conservative checking of safely failures. This framework is not restricted to the checking of timed asynchronous circuits. Secondly, we propose a new (conservative) semantics for timed circuits, in order to use the proposed framework for hazard checking of such circuits. Using this framework with the proposed semantics yields an efficient algorithm that addresses the limitations of the previous approaches.
引用
收藏
页码:51 / +
页数:2
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