Interface Trap-Induced Nonideality in As-Deposited Ni/4H-SiC Schottky Barrier Diode

As-deposited Ni/SiC Schottky diodes often show nonideal forward conduction characteristics. The ideality can be improved by the formation of a nickel-silicide/SiC interface by annealing at >650 degrees C. The nonideal characteristics in as-deposited diodes are generally attributed to Schottky barrier inhomogeneity at the interface. However, recent studies show that highly nonideal characteristics (n > 1.2) cannot be explained by the existing inhomogeneity models. In this paper, we report the observation of hysteresis patterns in the I-V and CV characteristics of as-deposited nonideal diodes. It is argued that the existence of evenly distributed slow, donor-like interface traps can explain the hysteresis and the associated Schottky nonideality. A trap density of 10(8)-10(10) cm(-2) was estimated from the I-V and CV hysteresis.