Modelling pipelines for embedded parallel processor system design

被引：5

作者：

Fleury, M ^{[1
]}

Downton, AC ^{[1
]}

Clark, AF ^{[1
]}

机构：

[1] Univ Essex, Dept Elect Syst Engn, Colchester CO4 4SQ, Essex, England

来源：

ELECTRONICS LETTERS | 1997年 / 33卷 / 22期

关键词：

pipeline processing; parallel processing; queueing theory;

D O I：

10.1049/el:19971249

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Four uses of order statistics for modelling parallel pipelines are proposed. The models are relevant to embedded applications using message-passing machines. A novel combination of queueing theory and order statistics, and a way of predicting degradation through any output-sequencing constraint are given. A simulation confirms the robustness of the analytic results.

引用

页码：1852 / 1853

页数：2

共 8 条

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PRITCHARD DJ, 1987, 7 OCC US GROUP TECH

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