Current mode circuits for fast and accurate optical level monitoring with wide dynamic range

被引:0
|
作者
Bauwelinck, J
Verhulst, D
Ossieur, P
Qiu, XZ
Vandewege, J [1 ]
De Vos, B
机构
[1] Univ Ghent, INTEC, IMEC, B-9000 Ghent, Belgium
[2] Alcatel Res & Innovat, B-2018 Antwerp, Belgium
关键词
burst mode laser driver; current comparator; active-input current mirror; optical feedback loop; BiCMOS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a new approach based on current mode circuits for fast and accurate optical level monitoring with wide dynamic range of a gigabit burst-mode laser driver chip. Our proposed solution overcomes the drawbacks that voltage mode implementations show at higher bit rates or in other technologies. The main speed-limiting factor of the level monitoring circuitry is the parasitic capacitance of the back facet monitor photodiode. We propose the use of an active-input current mirror to reduce the impact of this parasitic capacitance. The mirror produces two copies of the photo current, one to be used for the "0" level measurement and another for the "1" level measurement. The mirrored currents are compared to two reference currents by two current comparators. Every reference current needs only one calibration at room temperature. A pattern detection block scans the incoming data for patterns of sufficiently long consecutive 0's or 1's. At the end of such a pattern a valid measurement is present at the output of one of the current comparators. Based on these measurements the digital Automatic Power Control (APC) will adjust the bias (I-BIAS) and modulation current (I-MOD) setting of the laser driver. Tests show that the chip can stabilize and track the launched optical power with a tolerance of less than I dB. In these tests the pattern detection was programmed to sample the current comparators after 5 bytes (32 ns at 1.25 Gbps) of consecutive 1's and 0's. Automatic power control on such short strings of data has not been demonstrated before. Although this laser transmitter was developed for FSAN GPON applications at a speed of 1.25 Gbps upstream, the design concept is generic and can be applied for developing a wide range of burst mode laser transmitters. This chip was developed in a 0.35 mum SiGe BiCMOS process.
引用
收藏
页码:2641 / 2647
页数:7
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