Level converters with high immunity to power-supply bouncing for high-speed sub-1-V LSIs

被引：25

作者：

Kanno, Y ^{[1
]}

Mizuno, H ^{[1
]}

Tanaka, K ^{[1
]}

Watanabe, T ^{[1
]}

机构：

[1] Hitachi Ltd, Cent Res Lab, Kokubunji, Tokyo 1858601, Japan

来源：

2000 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS | 2000年

关键词：

D O I：

10.1109/VLSIC.2000.852890

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We have developed a pump-hopping level-up converter and a differential-input. level-down converter that enable level conversion for I/O interfacing in sub-1-V LSIs. The level-up converter transforms signals of 0.61 V to 3.6 V within 5 ns with a 0.14-mu m CMOS technology. The differential input level down converter enables stable operation even at VDD of 0.5 V. These proposed level converters also provide the immunity against power-supply bouncing, which is essential For low-voltage and high-speed LSIs.

引用

页码：202 / 203

页数：2