A novel SEU hardened SRAM bit-cell design

被引：8

作者：

Li, Tiehu ^{[1
,2
]}

Yang, Yintang ^{[1
]}

Zhang, Junan ^{[2
]}

Liu, Jia ^{[2
]}

机构：

[1] Xidian Univ, Sch Microelect, Xian 710071, Shaanxi, Peoples R China

[2] Sci & Technol Analog Integrated Circuit Lab, Chongqing 400060, Peoples R China

来源：

IEICE ELECTRONICS EXPRESS | 2017年 / 14卷 / 12期

关键词：

SRAM; single event upset; radiation hardening by design; CMOS TECHNOLOGY; ROBUST;

D O I：

10.1587/elex.14.20170413

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An improved single event upset (SEU) tolerant static random access memory (SRAM) bit-cell with differential read and write capability is proposed. SPICE simulation suggests a more than 1000 times improvement of the critical charge over the standard 6T SRAM cell. With the SEU robustness greatly enhanced at low area and electrical performance costs, the proposed cell is well suited to harsh radiation environment applications such as aerospace and high energy physics.

引用

页数：8

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