Fault macromodeling for analog/mixed-signal circuits
被引:10
作者:
Pan, CY
论文数: 0引用数: 0
h-index: 0
机构:
Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93016 USAUniv Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93016 USA
Pan, CY
[1
]
Cheng, KTT
论文数: 0引用数: 0
h-index: 0
机构:
Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93016 USAUniv Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93016 USA
Cheng, KTT
[1
]
机构:
[1] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93016 USA
来源:
ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY
|
1997年
关键词:
D O I:
10.1109/TEST.1997.639706
中图分类号:
TP3 [计算技术、计算机技术];
学科分类号:
0812 ;
摘要:
In this paper we propose an efficient fault macromodeling technique for analog/mixed-signal circuits. We formulate the fault macromodeling problem as a problem of deriving the macro parameter set B based on the performance parameter set P of the transistor-level faulty circuit. The fault macromodel is intended to be used for efficient macro-level fault simulation. In such applications, a common approach to speeding up the macromodeling process is to generate a large number of data pairs (P: B) (the training set) and interpolate an empirical mapping function B=F(P) based on the training set. In our technique, generation of each data pair requires only one run of macro-level simulation, as opposed to multiple runs of macro-level simulation required by iterative fault macromodeling techniques. We also propose a cross-correlation-based technique to select a subset of parameters from the high dimensional parameter set P to speed up function interpolation. We demonstrate the effectiveness and efficiency of our proposed fault macromodeling technique by showing some preliminary experimental results on an industrial design.