Comprehensive Kubo-Greenwood modelling of FDSOI MOS devices down to deep cryogenic temperatures

被引:3
作者
Balestra, F. Serra di Santa [1 ]
Contamin, L. [2 ]
Casse, M. [2 ]
Theodorou, C. [1 ]
Balestra, F.
Ghibaudo, G. [1 ]
机构
[1] Univ Grenoble Alpes, IMEP LAHC, Minatec, F-38016 Grenoble, France
[2] Univ Grenoble Alpes, CEA LETI, Minatec, F-38054 Grenoble, France
基金
欧盟地平线“2020”;
关键词
Kubo-Greenwood; Mobility; Modeling; MOSFET; FDSOI; Cryogenic temperature; CMOS TECHNOLOGY; SCATTERING; MOBILITY;
D O I
10.1016/j.sse.2022.108271
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A comprehensive Kubo-Greenwood modelling of FDSOI MOS devices is performed down to deep cryogenic temperatures. It is found that a single set of mobility parameters is only necessary to fit the capacitance and drain current transfer characteristics versus temperature for long channel devices. In contrast, in short channel transistors, the neutral scattering mobility component mu N is found to decrease at small gate length due to the increased impact of neutral defects close to source/drain ends whatever the temperature. Moreover, a closed form analytical expression for the Coulomb scattering has been developed, useful for device compact modelling.
引用
收藏
页数:7
相关论文
共 23 条
[11]   NEW METHOD FOR THE EXTRACTION OF MOSFET PARAMETERS [J].
GHIBAUDO, G .
ELECTRONICS LETTERS, 1988, 24 (09) :543-545
[12]  
Gutierrez EA, 2000, Low temperature electronics: physics, devices, circuits, and applications
[13]   Cryogenic Control Architecture for Large-Scale Quantum Computing [J].
Hornibrook, J. M. ;
Colless, J. I. ;
Lamb, I. D. Conway ;
Pauka, S. J. ;
Lu, H. ;
Gossard, A. C. ;
Watson, J. D. ;
Gardner, G. C. ;
Fallahi, S. ;
Manfra, M. J. ;
Reilly, D. J. .
PHYSICAL REVIEW APPLIED, 2015, 3 (02)
[14]   Characterization and Compact Modeling of Nanometer CMOS Transistors at Deep-Cryogenic Temperatures [J].
Incandela, Rosario M. ;
Song, Lin ;
Homulle, Harald ;
Charbon, Edoardo ;
Vladimirescu, Andrei ;
Sebastiano, Fabio .
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01) :996-1006
[15]   Modeling of electron mobility in gated silicon nanowires at room temperature: Surface roughness scattering, dielectric screening, and band nonparabolicity [J].
Jin, Seonghoon ;
Fischetti, Massimo V. ;
Tang, Ting-Wei .
JOURNAL OF APPLIED PHYSICS, 2007, 102 (08)
[16]   A CMOS silicon spin qubit [J].
Maurand, R. ;
Jehl, X. ;
Kotekar-Patil, D. ;
Corna, A. ;
Bohuslavskyi, H. ;
Lavieville, R. ;
Hutin, L. ;
Barraud, S. ;
Vinet, M. ;
Sanquer, M. ;
De Franceschi, S. .
NATURE COMMUNICATIONS, 2016, 7
[17]  
Mott N.F., 1971, Electronic processes in non-crystalline materials
[18]   Front and back channels coupling and transport on 28 nm FD-SOI MOSFETs down to liquid-He temperature [J].
Paz, Bruna Cardoso ;
Casse, Mikael ;
Haendler, Sebastien ;
Juge, Andre ;
Vincent, Emmanuel ;
Galy, Philippe ;
Arnaud, Franck ;
Ghibaudo, Gerard ;
Vinet, Maud ;
de Franceschi, Silvano ;
Meunier, Tristan ;
Gaillard, Fred .
SOLID-STATE ELECTRONICS, 2021, 186
[19]  
Planes N., 2012, 2012 IEEE Symposium on VLSI Technology, P133, DOI 10.1109/VLSIT.2012.6242497
[20]   Low temperature characterization of mobility in 14 nm FD-SOI CMOS devices under interface coupling conditions [J].
Shin, Minju ;
Shi, Ming ;
Mouis, Mireille ;
Cros, Antoine ;
Josse, Emmanuel ;
Kim, Gyu-Tae ;
Ghibaudo, Gerard .
SOLID-STATE ELECTRONICS, 2015, 108 :30-35