Scalable yet Rigorous Floating-Point Error Analysis

被引:20
作者
Das, Arnab [1 ]
Briggs, Ian [1 ]
Gopalakrishnan, Ganesh [1 ]
Krishnamoorthy, Sriram [2 ]
Panchekha, Pavel [1 ]
机构
[1] Univ Utah, Salt Lake City, UT 84112 USA
[2] Pacific Northwest Natl Lab, Richland, WA 99352 USA
来源
PROCEEDINGS OF SC20: THE INTERNATIONAL CONFERENCE FOR HIGH PERFORMANCE COMPUTING, NETWORKING, STORAGE AND ANALYSIS (SC20) | 2020年
基金
美国国家科学基金会;
关键词
Floating-point arithmetic; Round-off error; Numerical Analysis; Symbolic Execution; Algorithmic Differentiation; Abstraction; Scalable Analysis; ACCURACY; BOUNDS;
D O I
10.1109/SC41405.2020.00055
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Automated techniques for rigorous floating-point round-off error analysis are a prerequisite to placing important activities in HPC such as precision allocation, verification, and code optimization on a formal looting. Yet existing techniques cannot provide tight hounds for expressions beyond a few dozen operators-barely enough for HPC. In this work, we offer an approach embedded in a new tool called SATIRE that scales error analysis by four orders of magnitude compared to today's best-of-class tools. We explain how three key ideas underlying SATIRE helps it attain such scale: path strength reduction, bound optimization, and abstraction. SATIRE provides tight bounds and rigorous guarantees on significantly larger expressions with well over a hundred thousand operators, covering important examples including FFT, matrix multiplication, and PDE stencils.
引用
收藏
页数:14
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