Five-level cascade asymmetric multilevel converter

被引:37
作者
Gonzalez, S. A. [1 ]
Valla, M. I.
Christiansen, C. F.
机构
[1] Natl Univ La Plata, Fac Ingn, LEICI, RA-1900 La Plata, Buenos Aires, Argentina
关键词
TOPOLOGIES; IMPLEMENTATION; INVERTERS;
D O I
10.1049/iet-pel.2008.0318
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A five-level cascaded asymmetric multilevel converter is analysed and designed. This topology synthesises five voltage levels with a reduced number of components when compared to the most common symmetric topologies. It allows getting more voltage levels with less switching states. Its behaviour is similar to a hybrid converter with the advantage of working with only one DC bus. It does not present the usual drawbacks of symmetrical topologies. The cascaded asymmetric converter, presented here, appears as a very attractive alternative among the five-level converters with no voltage balancing problem. The performance of the proposed topology is evaluated with Pspice simulations in different applications.
引用
收藏
页码:120 / 128
页数:9
相关论文
共 25 条
[1]   Active neutral-point-clamped multilevel converters [J].
Barbosa, P ;
Steimer, P ;
Steinke, J ;
Meysenc, L ;
Winkelnkemper, M ;
Celanovic, N .
2005 IEEE 36TH POWER ELECTRONIC SPECIALISTS CONFERENCE (PESC), VOLS 1-3, 2005, :2296-2301
[2]   Modeling and design of a neutral-point voltage regulator for a three-level diode-clamped inverter using multiple-carrier modulation [J].
Bendre, Ashish ;
Venkataramanan, Giri ;
Rosene, Don ;
Srinivasan, Vijay .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2006, 53 (03) :718-726
[3]   The active NPC converter and its loss-balancing control [J].
Brückner, T ;
Bernet, S ;
Güldner, H .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2005, 52 (03) :855-868
[4]   A comparison of diode-clamped and cascaded multilevel converters for a STATCOM with energy storage [J].
Cheng, Ying ;
Qian, Chang ;
Crow, Mariesa L. ;
Pekarek, Steve ;
Atcitty, Stan .
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2006, 53 (05) :1512-1521
[5]   Comparison of hard-switched multi-level inverter topologies for STATCOM by loss-implemented simulation and cost estimation [J].
Fujii, K ;
Schwarzer, U ;
Doncker, RW .
2005 IEEE 36TH POWER ELECTRONIC SPECIALISTS CONFERENCE (PESC), VOLS 1-3, 2005, :340-346
[6]   Design of a tuned balancing network for flying capacitor multilevel converters [J].
González, SA ;
Valla, MI ;
Christiansen, CF .
2005 IEEE 36th Power Electronic Specialists Conference (PESC), Vols 1-3, 2005, :1046-1051
[7]   Analysis of a cascade asymmetric topology for multilevel converters [J].
Gonzalez, Sergio A. ;
Valla, Maria I. ;
Christiansen, Carlos F. .
2007 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, PROCEEDINGS, VOLS 1-8, 2007, :1027-+
[8]  
Holmes D. G., 2003, Pulse Width Modulation for Power Convert- ers: Principles and Practice, V18
[9]  
KAI D, 2005, 36 ANN IEEE POW ELEC, P2302
[10]   Voltage balancing method and its stability boundary for five-level diode-clamped multilevel converters [J].
Khajehoddin, S. A. ;
Bakhshai, A. ;
Jain, P. K. .
2007 IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1-6, 2007, :2204-2208