3D GPU Architecture using Cache Stacking: Performance, Cost, Power and Thermal analysis

被引:0
作者
Al Maashri, Ahmed [1 ]
Sun, Guangyu [1 ]
Dong, Xiangyu [1 ]
Narayanan, Vijay [1 ]
Xie, Yuan [1 ]
机构
[1] Penn State Univ, Dept Comp Sci & Engn, University Pk, PA 16802 USA
来源
2009 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN | 2009年
关键词
D O I
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Graphics Processing Units (GPUs) offer tremendous computational and processing power. The architecture requires high communication bandwidth and lower latency between computation units and caches. 3D die-stacking technology is a promising approach to meet such requirements. To the best of our knowledge no other study has investigated the implementation of 3D technology in GPUs. In this paper, we study the impact of stacking caches using the 3D technology on GPU performance. We also investigate the benefits of using 3D stacked MRAM on GPUs. Our work includes cost, power, and thermal analysis of the proposed architectural designs. Our results show a 53% geometric mean performance speedup for iso-cycle time architectures and about 19% for iso-cost architectures.
引用
收藏
页码:254 / 259
页数:6
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