Design constraints for third-order PLL nodes in master-slave clock distribution networks

被引：6

作者：

Bueno, A. M. ^{[1
]}

Rigon, A. G. ^{[1
]}

Ferreira, A. A. ^{[1
]}

Piqueira, Jose R. C. ^{[1
]}

机构：

[1] Univ Sao Paulo, Escola Politecn, Dept Engn Telecomunicacoes & Controle, BR-05508900 Sao Paulo, Brazil

来源：

COMMUNICATIONS IN NONLINEAR SCIENCE AND NUMERICAL SIMULATION | 2010年 / 15卷 / 09期

关键词：

Phase-locked loop; Second-order filter; Synchronization; Stability; OPERATION; JITTER;

D O I：

10.1016/j.cnsns.2009.09.039

中图分类号：

O29 [应用数学];

学科分类号：

070104 ;

摘要：

Clock signal distribution in telecommunication commercial systems usually adopts a master-slave architecture, with a precise time basis generator as a master and phase-locked loops (PLLs) as slaves. In the majority of the networks, second-order PLLs are adopted due to their simplicity and stability. Nevertheless, in some applications better transient responses are necessary and, consequently, greater order PLLs need to be used, in spite of the possibility of bifurcations and chaotic attractors. Here a master-slave network with third-order PLLs is analyzed and conditions for the stability of the synchronous state are derived, providing design constraints for the node parameters, in order to guarantee stability and reachability of the synchronous state for the whole network. Numerical simulations are carried out in order to confirm the analytical results. (C) 2009 Elsevier B.V. All rights reserved.

引用

页码：2565 / 2574

页数：10