FPGA-Based Design Of a High-Performance and Modular Video Processing Platform

被引:0
作者
Desmouliers, Christophe [1 ]
Oruklu, Erdal [1 ]
Saniie, Jafar [1 ]
机构
[1] IIT, Dept Elect & Comp Engn, Chicago, IL 60616 USA
来源
2009 IEEE INTERNATIONAL CONFERENCE ON ELECTRO/INFORMATION TECHNOLOGY | 2009年
关键词
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
In this paper, an FPGA-based design and implementation of a high-performance video processing platform (VPP) is presented. A hardware/software codesign system is proposed on Xilinx Virtex II Pro FPGA to realize complex algorithms for real-time image and video processing. This paper presents the framework of the VPP, discusses the architectural building blocks and FPGA synthesis results. Each hardware (custom accelerator blocks) and software (code running on an embedded CPU core) component is described comprehensively, laying the foundation for an adaptable and modular embedded system. As a case study, a real-time motion detection algorithm is implemented demonstrating the feasibility of the proposed platform. Additional hardware accelerators can be easily plugged-in to the system for desired processing engines. VPP can be a robust, cost-effective solution for a broad range of multimedia applications including broadcasting and streaming video, video on-demand, video encoding/decoding, surveillance, detection and recognition.
引用
收藏
页码:391 / 396
页数:6
相关论文
共 10 条
[1]  
ATITALLAH A, 2007, 14 IEEE INT C EL CIR, P30
[2]   A general hardware/software co-design methodology for embedded signal processing and multimedia workloads [J].
Brogioli, Michael ;
Radosavljevic, Predrag ;
Cavallaro, Joseph R. .
2006 FORTIETH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS AND COMPUTERS, VOLS 1-5, 2006, :1486-+
[3]  
*DSP DES LIN, BT656 ITUR DSP DES L
[4]   Versatile PC/FPGA-based verification/fast prototyping platform with multimedia applications [J].
Lin, Yi-Li ;
Young, Chung-Ping ;
Su, Alvin W. Y. .
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2007, 56 (06) :2425-2434
[5]   A software/hardware platform for rapid prototyping of video and multimedia designs [J].
Schumacher, P ;
Mattavelli, M ;
Chirila-Rus, A ;
Turney, R .
Fifth International Workshop on System-on-Chip for Real-Time Applications, Proceedings, 2005, :30-33
[6]  
*XIL, PLB IPIF DAT
[7]  
*XIL, CORE GEN
[8]  
*XIL, XUPV2P REF DES
[9]   Cluster-based hybrid reconfigurable architecture for auto-adaptive SoC [J].
Zhang, Xun ;
Rabah, Hassan ;
Weber, Serge .
2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, :979-982
[10]  
Zhang X, 2007, NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS, PROCEEDINGS, P139