FPGA based reconfigurable platform for complex image processing

被引:0
作者
Birla, Manish Kumar [1 ]
机构
[1] Siemens Corp Technol, Bangalore 560100, Karnataka, India
来源
2006 IEEE INTERNATIONAL CONFERENCE ON ELECTRO/INFORMATION TECHNOLOGY | 2006年
关键词
CMOS image sensor; field programmable gate arrays (FPGA); image processing; parallel processing;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Field Programmable Gate Arrays (FPGAs) are in use to build high performance DSP systems. FPGAs are uniquely suited to repetitive DSP tasks, such as multiply and accumulate (MAC) operations in parallel. As a result FPGAs can vastly outperform DSP chips, which perform operations in an essentially sequential fashion. The interfaces between FPGA and image sensor have been very slow, which inhibits possibility of exploiting parallel processing in the FPGA This paper discusses method to build an image-processing platform using FPGA. This involves interfacing of FPGA to CMOS image sensor and VGA monitor. We discuss techniques that helped attending speed of 50 FPS (Frames per Second) for an interface of CMOS image sensor to FPGA from earlier reported speed of 3 FPS. A benchmarking application has been executed on FPGA and DSP based system and comparative real time performance data is reported.
引用
收藏
页码:204 / 209
页数:6
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