Active Si Interposer for 3D IC Integrations

被引:0
作者
Kim, Joungho [1 ]
机构
[1] Korea Adv Inst Sci & Technol, Dept Elect Engn, Tearahertz Interconnect & Package Lab, Daejeon, South Korea
来源
2015 INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC 2015) | 2015年
关键词
Active interposer; 3D IC; interposer; equalizer; 3D clock delivery network;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
3D IC is becoming the most promising solution for the future low power, high bandwidth, and small size semiconductor systems including computer, mobile, and network systems. In the 3D IC, Si interposer can effectively serve as the high density and high bandwidth interconnections between the chips on the interposers. Si interposer for HBM (High-bandwidth Memory Module) is an example. In this paper, we propose a new novel interposer structure which is called as "Active interposer." In the proposed active interposer scheme, passive devices and active circuits are integrated together to enhance the signal integrity, and power integrity, and to lower power consumptions. The actives circuits in the Si interposer include equalizer, clock distribution network as well as DC-DC converter circuit. Also, wireless power delivery network can be added to reduce the number and space of P/G balls and vias.
引用
收藏
页数:7
相关论文
共 7 条
[1]  
[Anonymous], P 3D SYST INT C NOV
[2]  
DETALLE M, 2013, EL COMP TECHN C 28 3, P323
[3]  
Detalle M., 2013, INT C SOL STAT DEV M
[4]  
Hellings G., 2015, P S VLSI TECHN CIRC, P222
[5]  
Madden L., 2012, 2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC), P18
[6]  
Marinissen Erik Jan, 2009, Proceedings of the 2009 IEEE International Test Conference (ITC 2009), DOI 10.1109/TEST.2009.5355674
[7]  
Velenis D., 2013, IEEE 3D SYST INT C, P1