Multistacked Al2O3/HfO2/SiO2 tunnel layer for high-density nonvolatile memory application

被引:44
作者
Chen, Wei [1 ]
Liu, Wen-Jun [1 ]
Zhang, Min [1 ]
Ding, Shi-Jin [1 ]
Zhang, David Wei [1 ]
Li, Ming-Fu [1 ]
机构
[1] Fudan Univ, Sch Microelect, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
基金
中国国家自然科学基金;
关键词
D O I
10.1063/1.2756849
中图分类号
O59 [应用物理学];
学科分类号
摘要
A memory capacitor with a multistacked tunnel layer of Al2O3/HfO2/SiO2 (AHO) has been fabricated together with HfO2 charge trapping layer and Al2O3 control oxide layer. The resulting capacitor exhibits a memory window as large as 7.6 V for +/- 12 V sweep voltage range, a significant flatband voltage shift of 2.1 V after 10 V/100 mu s programing as well as improved charge retention compared with a single SiO2 tunnel layer. The different memory effects in various sweep voltage ranges and enhanced retention characteristics have been explained based on the variable electrical thickness of the AHO stack under different electric fields. (C) 2007 American Institute of Physics.
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页数:3
相关论文
共 15 条
[1]   Design considerations in scaled SONOS nonvolatile memory devices [J].
Bu, JK ;
White, MH .
SOLID-STATE ELECTRONICS, 2001, 45 (01) :113-120
[2]   Investigation of SiO2/HfO2 gate stacks for application to non-volatile memory devices [J].
Buckley, J ;
De Salvo, B ;
Ghibaudo, G ;
Gely, M ;
Damlencourt, JF ;
Martin, F ;
Nicotra, G ;
Deleonibus, S .
SOLID-STATE ELECTRONICS, 2005, 49 (11) :1833-1840
[3]   Memory effect of metal-insulator-silicon capacitor with HfO2-Al2O3 multilayer and hafnium nitride gate [J].
Ding, Shi-Jin ;
Zhang, Min ;
Chen, Wei ;
Zhang, David Wei ;
Wang, Li-Kang .
JOURNAL OF ELECTRONIC MATERIALS, 2007, 36 (03) :253-257
[4]   High density and program-erasable metal-insulator-silicon capacitor with a dielectric structure of SiO2/HfO2-Al2O3 nanolaminate/Al2O3 -: art. no. 042905 [J].
Ding, SJ ;
Zhang, M ;
Chen, W ;
Zhang, DW ;
Wang, LK ;
Wang, XP ;
Zhu, CX ;
Li, MF .
APPLIED PHYSICS LETTERS, 2006, 88 (04) :1-3
[5]   VARIOT: A novel multilayer tunnel barrier concept, for low-voltage nonvolatile memory devices [J].
Govoreanu, B ;
Blomme, P ;
Rosmeulen, M ;
Van Houdt, J ;
De Meyer, K .
IEEE ELECTRON DEVICE LETTERS, 2003, 24 (02) :99-101
[6]   Crested barrier in the tunnel stack of non-volatile memories [J].
Irrera, F ;
Puzzilli, G .
MICROELECTRONICS RELIABILITY, 2005, 45 (5-6) :907-910
[7]   Engineered barriers with hafnium oxide for nonvolatile application [J].
Irrera, Fernanda .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (09) :2418-2422
[8]   Charge-trapping device structure of SiO2/SiN/high-k dielectric Al2O3 for high-density flash memory -: art. no. 152908 [J].
Lee, CH ;
Hur, SH ;
Shin, YC ;
Choi, JH ;
Park, DG ;
Kim, K .
APPLIED PHYSICS LETTERS, 2005, 86 (15) :1-3
[9]   Layered tunnel barriers for nonvolatile memory devices [J].
Likharev, KK .
APPLIED PHYSICS LETTERS, 1998, 73 (15) :2137-2139
[10]   Improved performance of SiGe nanocrystal memory with VARIOT tunnel barrier [J].
Liu, Yueran ;
Dey, Sagnik ;
Tang, Shan ;
Kelly, David Q. ;
Sarkar, J. ;
Banerjee, Sanjay K. .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (10) :2598-2602