Evaluation of the IEEE Std 1547.1-2020 Unintentional Islanding Test Using Power Hardware-in-the-Loop

被引：0

作者：

Desarden-Carrero, Edgardo ^{[1
]}

Darbali-Zamora, Rachid ^{[2
]}

Gurule, Nicholas S. ^{[2
]}

Aponte-Bezares, Erick ^{[1
]}

Gonzalez, Sigifredo ^{[2
]}

机构：

[1] Univ Puerto Rico, Mayaguez, PR 00682 USA

[2] Sandia Natl Labs, POB 5800, Albuquerque, NM 87185 USA

来源：

2020 47TH IEEE PHOTOVOLTAIC SPECIALISTS CONFERENCE (PVSC) | 2020年

关键词：

photovoltaic; power inverter; power-hardware-in-the-loop; IEEE Std 1547.1; unintentional islanding test;

D O I：

10.1109/pvsc45281.2020.9300641

中图分类号：

TE [石油、天然气工业]; TK [能源与动力工程];

学科分类号：

0807 ; 0820 ;

摘要：

Photovoltaic (PV) inverters connected to electrical grids are required to detect and respond to Unintentional Islanding (UI) conditions appropriately. The IEEE Std 1547.1-2020 specifies test procedures, based on resonant parallel RLC loads, to evaluate the ability of PV inverters to detect and disconnect under UI conditions. This paper proposes a prototype Power Hardware-in-the-Loop (PHIL) UI testing console with a Human Machine Interphase (HMI) and a virtual RLC load to evaluate the IEEE Std 1547.1-2020 UI Cat. B tests. Traditional UI testing procedures rely on physical RLC elements, which are potentially expensive, large, and heat-generating sources. Using PHIL techniques, the UI test procedure itself, and the RLC load were implemented virtually within a simulation environment. The virtual console could potentially reduce testing costs, decrease execution time and pave the way for automated testing. This paper presents promising preliminary results from the virtual console prototype.

引用

页码：2262 / 2269

页数：8