Redundant Via Allocation for Layer Partition-based Redundant Via Insertion

被引:1
作者
Shen, Jian-Wei [1 ]
Chiang, Mei-Fang [1 ]
Chen, Song [1 ]
Guo, Wei [1 ]
Yoshimura, Takeshi [1 ]
机构
[1] Waseda Univ, Grad Sch IPS, Kitakyushu, Fukuoka 8080135, Japan
来源
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2009年
关键词
Redundant via; double via; design for manufacturability;
D O I
10.1109/ASICON.2009.5351310
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The occurrence of via defects increases due to the shrinking size in integrated circuit manufacturing. Redundant via insertion is an effective and recommended method to reduce the yield loss caused by via failures. In this paper, we introduce a redundant via allocation problem for layer partition-based model and solve it using genetic algorithm. The result of layer partition-based model depends on the partition and processing order of layers. With our redundant via allocation, it can be achieved independent of these factors. In our method, we first construct a graph to represent candidate relations between vias and redundant vias, and conflict relations between redundant vias because of design rule violations. Then the connected components of graph are computed. On each component, we can perform redundant via allocation on the boundaries of any layer partition. Genetic algorithm is used to optimize the allocation strategy. Experiment results show that our method can efficiently improve the redundant via insertion rate(1).
引用
收藏
页码:734 / 737
页数:4
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