Hardware Implementation of Tanh Exponential Activation Function using FPGA

被引：9
|
作者：
Bouguezzi, Safa [1 ,2 ]
Faiedh, Hassene [1 ,3 ]
Souani, Chokri [1 ,3 ]
机构：
[1] Univ Monastir, Microelect & Instrumentat Lab, Monastir, Tunisia
[2] Univ Monastir, Fac Sci Monastir, Monastir, Tunisia
[3] Univ Sousse, Higher Inst Appl Sci & Technol Sousse, Sousse, Tunisia
来源：
2021 18TH INTERNATIONAL MULTI-CONFERENCE ON SYSTEMS, SIGNALS & DEVICES (SSD) | 2021年
关键词：
FPGA; activation function; Tanh Exponential (TanhExp); Piecewise Linear approximation (PWL); Convolutional Neural Network (CNN); hardware resources;
D O I：
10.1109/SSD52085.2021.9429506
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The most active research area for Field Programmable Gate Arrays is the Convolution Neural Network (CNN), and the gist of any CNN is an activation function. Therefore, various non-linear activation functions aloe required for deeper CNNo In this paper, we aim to implement the Tanh Exponential (TanhExp) activation function on Artix-7 and Zynq-7000. To this end, we will use the piecewise linear approximation and the second-order polynomial approximation while using the IEEE754 2008 floating-point representation. We present an investigation of the required hardware resources. We also evaluate the efficiency of each method of approximation and its derivative.
引用
收藏
页码：1020 / 1025
页数：6
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