A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS

被引：40
|
作者：
Kim, Jihwan [1 ]
Kundu, Sandipan [1 ]
Balankutty, Ajay [1 ]
Beach, Matthew [2 ]
Kim, Bong Chan [1 ]
Kim, Stephen [1 ]
Liu, Yutao [1 ]
Murthy, Savyassachi Keshava [1 ]
Wali, Priya [1 ]
Yu, Kai [1 ]
Kim, Hyung Seok [1 ]
Liu, Chuan-chang [1 ]
Shin, Dongseok [1 ]
Cohen, Ariel [3 ]
Fan, Yongping [1 ]
O'Mahony, Frank [1 ]
机构：
[1] Intel, Hillsboro, OR 97124 USA
[2] Fdn Devices, Boston, MA USA
[3] Intel, Jerusalem, Israel
来源：
2021 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC) | 2021年 / 64卷
关键词：
D O I：
10.1109/ISSCC42613.2021.9365840
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：126 / +
页数：3
相关论文
共 50 条
  • [31] 10 Gb/s Duobinary transmitter with a 6-tap FFE using 180 nm CMOS technology
    Zhang, Yinhang
    Yin, Chao
    Yang, Xi
    Zhan, Yongzheng
    MICROELECTRONICS JOURNAL, 2025, 156
  • [32] A 64 Gb/s 1.5 pJ/bit PAM-4 Transmitter with 3-Tap FFE and Gm-Regulated Active-Feedback Driver in 28 nm CMOS
    Ju, Haram
    Choi, Moon-Chul
    Jeong, Gyu-Seob
    Jeong, Deog-Kyoon
    2018 IEEE SYMPOSIUM ON VLSI CIRCUITS, 2018, : 51 - 52
  • [33] An 8Gb/s 1.5mW/Gb/s 8-Tap 6b NRZ/PAM-4 Tomlinson-Harashima Precoding Transmitter for Future Memory-Link Applications in 22nm CMOS
    Kossel, Marcel
    Toifl, Thomas
    Francese, Pier Andrea
    Braendli, Matthias
    Menolfi, Christian
    Buchmann, Peter
    Kull, Lukas
    Andersen, Toke Meyer
    Morf, Thomas
    2013 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), 2013, 56 : 408 - +
  • [34] A 4-40 Gb/s PAM-4 transmitter with a hybrid driver in 65 nm CMOS technology
    Wang, Dengjie
    Chen, Hong
    Luan, Wenhuan
    Lin, Xin
    Lv, Fangxu
    Wang, Ziqiang
    Jiang, Hanjun
    Zhang, Chun
    Wang, Zhihua
    2019 IEEE 62ND INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2019, : 251 - 254
  • [35] A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS
    Peng, Pen-Jui
    Chen, Yan-Ting
    Lai, Sheng-Tsung
    Chen, Chao-Hsuan
    Huang, Hsiang-En
    Shih, Ted
    2019 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2019, 62 : 124 - +
  • [36] A Design of Data Path Based on CMOS Logic for a 72-Gb/s PAM-4 Transmitter in 28-nm CMOS
    Choi, Moon-Chul
    Ju, Haram
    Ko, Han-Gon
    Jeong, Deog-Kyoon
    2019 INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION, AND COMMUNICATION (ICEIC), 2019, : 299 - 302
  • [37] A Monolithic 56 Gb/s CMOS Integrated Nanophotonic PAM-4 Transmitter
    Xiong, Chi
    Gill, Douglas
    Proesel, Jonathan
    Orcutt, Jason
    Haensch, Wilfried
    Green, William M. J.
    2015 IEEE OPTICAL INTERCONNECTS CONFERENCE, 2015, : 16 - 17
  • [38] An 80-Gb/s/pin Single-Ended Voltage-Mode PAM-4 Transmitter With a Pulsewidth Pre-Emphasis and a 4-Tap FFE in 28-nm CMOS
    Park, Jae-Koo
    Rho, Dae-Won
    Yang, Seung-Jae
    Choi, Woo-Young
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2025, 60 (02) : 519 - 528
  • [39] A 32-Gb/s PAM-4 SST Transmitter With Four-Tap FFE Using High-Impedance Driver in 28-nm FDSOI
    Celik, Firat
    Akkaya, Ayca
    Tajalli, Armin
    Leblebici, Yusuf
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2021, 29 (06) : 1132 - 1140
  • [40] A 112-Gb/s PAM-4 Voltage-Mode Transmitter With Four-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40-nm CMOS
    Peng, Pen-Jui
    Chen, Yan-Ting
    Lai, Sheng-Tsung
    Chen, Chao-Hsuan
    Huang, Hsiang-En
    Shih, Ted
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021, 56 (07) : 2123 - 2131
12345