共 49 条
- [32] Performance Evaluation and Optimization of Single Layer MoS2 Double Gate Transistors with metallic contacts 7TH IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2016, 2016,
- [33] Semi-analytical SPICE-compatible ballistic I–V model for 5 nm channel MoS2 FETs Journal of Computational Electronics, 2022, 21 : 1108 - 1115
- [34] Performance Evaluation of 15nm Gate Length Double-Gate n-MOSFETs with High Mobility Channels: III-V, Ge and Si SIGE, GE, AND RELATED COMPOUNDS 3: MATERIALS, PROCESSING, AND DEVICES, 2008, 16 (10): : 47 - 55
- [35] Serially Connected Monolayer MoS2 FETs with Channel Patterned by a 7.5 nm Resolution Directed Self-Assembly Lithography 2016 IEEE SYMPOSIUM ON VLSI TECHNOLOGY, 2016,
- [36] Device design considerations for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 407 - 410