Inversion MOS capacitance extraction for high-leakage dielectrics using a transmission line equivalent circuit

被引：36

作者：

Barlage, DW ^{[1
]}

O'Keeffe, JT ^{[1
]}

Kavalieros, JT ^{[1
]}

Nguyen, MM ^{[1
]}

Chau, RS ^{[1
]}

机构：

[1] Intel Corp, Component Res, Hillsboro, OR 97124 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2000年 / 21卷 / 09期

关键词：

capacitance measurement; MOS devices; tunneling;

D O I：

10.1109/55.863109

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Accurate measurement of MOS transistor inversion capacitance with a physical silicon dioxide thickness Less than 20 Angstrom requires correction for the direct tunneling leakage. This work presents a capacitance model and extraction based on the application of a lossy transmission line model to the MOS transistor. This approach properly accounts for the leakage current distribution along the channel and produces a gate length dependent correction factor for the measured capacitance that overcomes discrepancies produced through use of previously reported discrete element based models. An extraction technique is presented to determine the oxide's tunneling and channel resistance of the transmission line equivalent circuit. This model is confirmed by producing consistent C-ox measurements for several different gate lengths with physical silicon dioxide thickness of 9, 12, and 18 Angstrom.

引用

页码：454 / 456

页数：3

共 8 条

[1] Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFET's [J].