Energy Efficient Approximate 4:2 Compressors for Error Tolerant Applications

被引:0
|
作者
Krishna, L. Hemanth [1 ]
Rao, J. Bhaskara [1 ]
Sk, Ayesha [2 ]
Veeramachaneni, Sreehari [3 ]
Sk, Noor Mahammad [4 ]
机构
[1] GVP Coll Engn, Dept ECE, Vishakapatnam, India
[2] VIT Chennai, Sch CSE, Chennai, Tamil Nadu, India
[3] GRIET, Dept ECE, Hyderabad, India
[4] IIITDM Kancheepuram, Dept CSE, Chennai, Tamil Nadu, India
关键词
Energy Efficient Multiplier; Approximate Computing; Approximate 4:2 Compressor; Error tolerant applications;
D O I
10.1109/ICECS53924.2021.9665614
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In many real-life applications such as image/video processing, the error present in the output will not impact the output visual information. Approximation at the hardware level is one of the promising techniques to design energy-efficient circuits. This paper proposes an approximate 4:2 compressor design to reduce partial products in the multiplier design. The proposed approximate 4:2 compressor design consumes on an average 56% less energy compared with the existing designs from the literature, respectively. This paper proposes two variants of the approximate multiplier designs, where design1 uses only proposed approximate 4:2 compressors and multiplier design2's lower half of the multiplier is designed using proposed approximate 4:2 compressor and higher half of the multiplier is designed using existing accurate compressors to reduce the error rate and improve the output image visual quality.
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页数:6
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