Simulation and analytical approximation of ATM multistage shared buffer switch

A multistage ATM switch based on Clos interconnection of shared buffer switching elements is analyzed with the aim to develop design tools suitable for switch dimensioning in the range of ATM cell loss target. Starting from a simulation activity, which obtains the main switch performance and shows the effects of architectural and operational options, an approximated model is proposed. It is based on the discovery that statistical correlations in later stages of Clos network reduces so that it is feasible to treat different queue lengths as independent random variables to evaluate cell loss performance of a shared buffer switching element. Approximate dimensioning of the whole switch is also performed. Results are given and verified in the range tractable by simulation for uniform and multiplexed bursty traffic.