A Short-Time Transition and Cost Saving Redundancy Scheme for Medium-Voltage Three-Phase Cascaded H-Bridge Electronic Power Transformer

被引:40
作者
Tian, Jie [1 ]
Mao, Chengxiong [1 ]
Wang, Dan [1 ]
Nie, Shaoxiong [1 ]
Yang, Yun [1 ]
机构
[1] Huazhong Univ Sci & Technol, Sch Elect & Elect Engn, State Key Lab Adv Electromagnet Engn & Technol, Hubei Elect Power Secur & High Efficiency Key Lab, Wuhan 430074, Hubei, Peoples R China
基金
国家重点研发计划;
关键词
Electronic power transformer (EPT); redundancy; solid-state transformer (SST); SOLID-STATE TRANSFORMER; MODULAR MULTILEVEL CONVERTER; CONTROL STRATEGY; DESIGN;
D O I
10.1109/TPEL.2018.2794558
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Reliability is one of the major concerns when the electronic power transformer (EPT) is employed in the field, and redundancy is a common approach to improve the reliability. For hot and cold redundancy schemes, the redundancy performance will be degraded due to the small number of power modules (PMs) when the EPT is employed in the medium-voltage power grid. For the three-phase EPT, at least three redundant PMs are needed (one redundant PM per phase), which leads to a high redundancy cost. In this paper, a novel redundancy scheme is proposed. The proposed scheme can accomplish the faulty PM replacement process within tens of microseconds with nearly no transition. And only one PM and a set of switches are needed for the three-phase redundancy, which can effectively save the redundancy cost. The proposed scheme is analyzed and supported by simulations and experimental results.
引用
收藏
页码:9242 / 9252
页数:11
相关论文
共 34 条
[1]  
Ahmed N, 2015, IEEE IND ELEC, P3922, DOI 10.1109/IECON.2015.7392712
[2]   Semi-conductors faults analysis in dual active bridge DC-DC converter [J].
Airabella, Andres M. ;
Oggier, German G. ;
Piris-Botalla, Laureano E. ;
Falco, Cristian A. ;
Garcia, Guillermo O. .
IET POWER ELECTRONICS, 2016, 9 (06) :1103-1110
[3]   Modified space vector modulation for fault-tolerant operation of multilevel cascaded H-bridge inverters [J].
Aleenejad, Mohsen ;
Iman-Eini, Hossein ;
Farhangi, Shahrokh .
IET POWER ELECTRONICS, 2013, 6 (04) :742-751
[4]   Study and Handling Methods of Power IGBT Module Failures in Power Electronic Converter Systems [J].
Choi, Ui-Min ;
Blaabjerg, Frede ;
Lee, Kyo-Beum .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2015, 30 (05) :2517-2533
[5]   Hierarchical System Design and Control of an MMC-Based Power-Electronic Transformer [J].
Fan, Boran ;
Li, Yongdong ;
Wang, Kui ;
Zheng, Zedong ;
Xu, Lie .
IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, 2017, 13 (01) :238-247
[6]   Energy-balancing Control Strategy for Modular Multilevel Converters Under Submodule Fault Conditions [J].
Hu, Pengfei ;
Jiang, Daozhuo ;
Zhou, Yuebin ;
Liang, Yiqiao ;
Guo, Jie ;
Lin, Zhiyong .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2014, 29 (09) :5021-5030
[7]   Modeling and control of a cascaded multilevel converter-based electronic power transformer [J].
Huang, Hui ;
Zhang, Junfeng ;
Mao, Chengxiong ;
Lu, Jiming ;
Wang, Dan .
IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING, 2016, 11 (03) :268-275
[8]   Solid-State Transformers On the Origins and Evolution of Key Concepts [J].
Huber, Jonas E. ;
Kolar, Johann W. .
IEEE INDUSTRIAL ELECTRONICS MAGAZINE, 2016, 10 (03) :19-28
[9]  
Huber JE, 2014, IEEE ENER CONV, P4545, DOI 10.1109/ECCE.2014.6954023
[10]   Dead Time Compensation Method for Voltage-Fed PWM Inverter [J].
Hwang, Seon-Hwan ;
Kim, Jang-Mok .
IEEE TRANSACTIONS ON ENERGY CONVERSION, 2010, 25 (01) :1-10