Predictive Modeling of Channel Potential in 3-D NAND Flash Memory

被引：20

作者：

Kim, Yoon ^{[1
]}

Kang, Myounggon ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Memory Div, Hwaseong 445701, South Korea

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2014年 / 61卷 / 11期

关键词：

3-D NAND flash memory; capacitance modeling; nanowire SONOS; stacked array;

D O I：

10.1109/TED.2014.2355918

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

For the first time, this brief analyzes the channel potential and capacitance in channel-stack type 3-D NAND flash memory structure. In addition, the effects of geometrical parameters on 3-D NAND flash design with gate-all-around and double-gate devices are studied. The model can be incorporated into a compact circuit model for 3-D NAND flash design optimization.

引用

页码：3901 / 3904

页数：4

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