Optimizing data scheduling on processor-in-memory arrays

被引：2

作者：

Tian, Y ^{[1
]}

Sha, EHM ^{[1
]}

Chantrapornchai, C ^{[1
]}

Kogge, PM ^{[1
]}

机构：

[1] Univ Notre Dame, Dept Comp Sci & Engn, Notre Dame, IN 46556 USA

来源：

FIRST MERGED INTERNATIONAL PARALLEL PROCESSING SYMPOSIUM & SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING | 1998年

关键词：

D O I：

10.1109/IPPS.1998.669890

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In the study of PetaFlop project, Processor-in-Memory array was proposed to be a target architecture in achieving 10(15) floating paint operations per second computing performance. However one of the major obstacles to achieve the fast computing was interprocessor communications, which lengthen the total execution time of an application. A good data scheduling consisting of finding initial data placement and data movement during the run-time can give a significant reduction in the total communication cost and the execution time of the application. In this paper; we propose efficient algorithms for the data scheduling problem. Experimental results show the effectiveness of the proposed approaches. Compared with default data distribution methods such as raw-wise or column-wise distributions, the average improvement for the tested benchmarks can be up to 30%.

引用

页码：57 / 61

页数：5