Negative capacitance based phase-transition FET for low power applications: Device-circuit co-design

被引:4
作者
Yadav, Sameer [1 ]
Kondekar, P. N. [1 ]
Upadhyay, Pranshoo [2 ]
Awadhiya, Bhaskar [3 ]
机构
[1] Indian Inst Informat Technol Design & Mfg, Elect & Commun Engn Dept, Nanoelect & VLSI Lab, Jabalpur 482005, India
[2] Indian Inst Technol Madras, Dept Phys, Chennai 600036, Tamil Nadu, India
[3] Rajeev Gandhi Mem Coll Engn & Technol, Elect & Commun Engn Dept, Nandyal 518501, AP, India
关键词
Negative capacitance; Steep switching; Phase transition material; Steep slope devices; Subthreshold swing; Ripple carry adder; TEMPERATURE; TRANSISTORS; INSIGHTS;
D O I
10.1016/j.mejo.2022.105411
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this article, we have performed a comprehensive study into the Phase Transition Material based FinFET(PTFinFET) device's capabilities for low-power, energy-efficient applications through device circuit co-design perspective. Addressing its drawback at device and circuit level a novel device design known as the Negative Capacitance Phase Transition FinFET(NC-PTFinFET) is proposed by incorporating a ferroelectric material layer into the gate stack of the PTFinFET. The proposed device outperforms PTFinFET and FinFET in terms of SS and ON-OFF current ratio at the device level, as well as power and speed at the circuit level, and provides device tunability. With three case studies of embedded inverter chain, RO, and 2-bit RCA it was observed that the proposed NC-PTFinFET shows performance benefits in speed by reducing delay in these circuits with increasing NC thickness in comparison with the PTFinFET and FinFET. In contrast, increasing NC thickness in the proposed device energy efficiency is improved as compared to PTFinFET and FinFET.
引用
收藏
页数:10
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