Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling

被引:42
作者
Guin, U. [1 ]
Forte, D. [2 ]
Tehranipoor, M. [2 ]
机构
[1] Univ Connecticut, Dept Elect & Comp Engn, Storrs, CT 06269 USA
[2] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA
基金
美国国家科学基金会;
关键词
Combating die and IC recycling (CDIR); counterfeit integrated circuits (ICs); negative bias temperature instability (NBTI)-aware; recycling; SILICON ODOMETER; NBTI; HCI;
D O I
10.1109/TVLSI.2015.2466551
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The recycling of electronic components has become a major industrial and governmental concern, as it could potentially impact the security and reliability of a wide variety of electronic systems. It is extremely challenging to detect a recycled integrated circuit (IC) that is already used for a very short period of time because the process variations outpace the degradation caused by aging, especially in lower technology nodes. In this paper, we propose a suite of solutions, based on lightweight negative bias temperature instability (NBTI)-aware ring oscillators (ROs), for combating die and IC recycling (CDIR) when ICs are used for a very short duration. The proposed solutions are implemented in the 90-nm technology node. The simulation results demonstrate that our newly proposed NBTI-aware multiple pair RO-based CDIRs can detect ICs used only for a few hours.
引用
收藏
页码:1233 / 1246
页数:14
相关论文
共 36 条
  • [1] Circuit failure prediction and its application to transistor aging
    Agarwal, Mridul
    Paul, Bipul C.
    Zhang, Ming
    Mitra, Subhasish
    [J]. 25TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 2007, : 277 - +
  • [2] A comprehensive model of PMOS NBTI degradation
    Alam, MA
    Mahapatra, S
    [J]. MICROELECTRONICS RELIABILITY, 2005, 45 (01) : 71 - 81
  • [3] [Anonymous], P ACM IEEE 51 DES AU
  • [4] [Anonymous], 2014, DAC
  • [5] [Anonymous], 2011, TOP 5 MOST COUNT PAR
  • [6] Predictive modeling of the NBTI effect for reliable design
    Bhardwaj, Sarvesh
    Wang, Wenping
    Vattikonda, Rakesh
    Cao, Yu
    Vrudhula, Sarma
    [J]. PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 189 - 192
  • [7] Cassell J., 2012, REPORTS COUNTERFEIT
  • [8] Chen J., 2012, Proceedings of the Great Lakes Symposium on VLSI, P45
  • [9] CHEN KL, 1985, IEEE T ELECTRON DEV, V32, P386, DOI 10.1109/T-ED.1985.21953
  • [10] Dogan H, 2014, INT SYM DEFEC FAU TO, P171, DOI 10.1109/DFT.2014.6962099