A vertical WSe2-MoSe2 p-n heterostructure with tunable gate rectification

被引:29
作者
Liu, Hailing [1 ,2 ]
Hussain, Sajjad [1 ,2 ]
Ali, Asif [1 ,2 ]
Naqvi, Bilal Abbas [1 ,2 ]
Vikraman, Dhanasekaran [3 ]
Jeong, Woonyoung [1 ,2 ]
Song, Wooseok [4 ]
An, Ki-Seok [4 ]
Jung, Jongwan [1 ,2 ]
机构
[1] Sejong Univ, Graphene Res Inst, Seoul 143747, South Korea
[2] Sejong Univ, Inst Nano & Adv Mat Engn, Seoul 143747, South Korea
[3] Dongguk Univ Seoul, Div Elect & Elect Engn, Seoul 04620, South Korea
[4] Korea Res Inst Chem Technol, Thin Film Mat Res Ctr, Daejeon 305600, South Korea
基金
新加坡国家研究基金会;
关键词
CHEMICAL-VAPOR-DEPOSITION; LARGE-AREA SYNTHESIS; ATOMIC LAYERS; MOS2; WSE2; MONOLAYER; GROWTH; FILMS;
D O I
10.1039/c8ra03398f
中图分类号
O6 [化学];
学科分类号
0703 ;
摘要
Here, we report the synthesis of a vertical MoSe2/WSe2 p-n heterostructure using a sputtering-CVD method. Unlike the conventional CVD method, this method produced a continuous MoSe2/WSe2 p-n heterostructure. WSe2 and MoSe2 back-gated field effect transistors (FETs) exhibited good gate modulation behavior, and high hole and electron mobilities of approximate to 2.2 and approximate to 15.1 cm(2) V-1 s(-1), respectively. The fabricated vertical MoSe2/WSe2 p-n diode showed rectifying I-V behavior with back-gate tunability. The rectification ratio of the diode was increased with increasing gate voltage, and was increased from approximate to 18 to approximate to 1600 as the gate bias increased from -40 V to +40 V. This is attributed to the fact that the barrier height between p-WSe2 and n-MoSe2 is modulated due to the back-gate bias. The rectification ratio is higher than the previously reported values for the TMDC p-n heterostructure grown by CVD.
引用
收藏
页码:25514 / 25518
页数:5
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