A Write-friendly Arithmetic Coding Scheme for Achieving Energy-Efficient Non-Volatile Memory Systems

被引:10
作者
Chen, Yi-Shen [1 ]
Wu, Chun-Feng [1 ,2 ]
Chang, Yuan-Hao [2 ]
Kuo, Tei-Wei [1 ,3 ]
机构
[1] Natl Taiwan Univ, Dept Comp Sci & Informat Engn, Taipei, Taiwan
[2] Acad Sinica, Inst Informat Sci, Taipei, Taiwan
[3] City Univ Hong Kong, Coll Engn, Kowloon, Hong Kong, Peoples R China
来源
2021 26TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | 2021年
关键词
Internet of Things; non-volatile memory; data compression; arithmetic coding; energy efficiency; PHASE-CHANGE MEMORY;
D O I
10.1145/3394885.3431511
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In the era of the Internet of Things (IoT), wearable IoT devices become popular and closely related to our life. Most of these devices are based on the embedded systems that have to operate on limited energy resources, such as batteries or energy harvesters. Therefore, energy efficiency is one of the critical issues for these devices. To relieve the energy consumption by reducing the total accesses on memory and storage layers, the technologies of storage-class memory (SCM) and data compression techniques are applied to eliminate the data movements and squeeze the data size, respectively. However, the information gap between them hinders the cooperation among the two techniques for achieving further optimizations on minimizing energy consumption. This work proposes a write-friendly arithmetic coding with joint managing both techniques to achieve energy-efficient non-volatile memory (NVM) systems. In particular, the concept of "ignorable bits" is introduced to further skip the write operations while storing the compressed data into SCM devices. The proposed design was evaluated by a series of intensive experiments, and the results are encouraging.
引用
收藏
页码:633 / 638
页数:6
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