CGS(D)/CS(D)G capacitance phenomenon of 100nm fully-depleted SOICMOS devices with HfO2 high-K gate dielectric considering vertical and fringing displacement effects

被引：0

作者：

Lin, Yu-Sheng ^{[1
]}

Lin, Chia-Hong ^{[1
]}

Kuo, James B. ^{[1
]}

Su, Ker-Wei ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan

来源：

2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper reports the C-GS(D)/C-S(D)G capacitance phenomenon of 100nm fullydepleted (FD) SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effect. According to the 2D simulation results, a unique two-step C-S(D)G/C-GS versus V-G curve exists for the device with the 1.5nm HfO2 gate dielectric due to the vertical and fringing displacement effects.

引用

页码：95 / 98

页数：4

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