CGS(D)/CS(D)G capacitance phenomenon of 100nm fully-depleted SOICMOS devices with HfO2 high-K gate dielectric considering vertical and fringing displacement effects

被引：0

作者：

Lin, Yu-Sheng ^{[1
]}

Lin, Chia-Hong ^{[1
]}

Kuo, James B. ^{[1
]}

Su, Ker-Wei ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan

来源：

2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS | 2005年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper reports the C-GS(D)/C-S(D)G capacitance phenomenon of 100nm fullydepleted (FD) SOI CMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effect. According to the 2D simulation results, a unique two-step C-S(D)G/C-GS versus V-G curve exists for the device with the 1.5nm HfO2 gate dielectric due to the vertical and fringing displacement effects.

引用

页码：95 / 98

页数：4

共 5 条

[1] Gate capacitances Behavior of nanometer FD SOICMOS devices with HfO2 high-k gate dielectric considering vertical and fringing displacement effects using 2-d simulation
Lin, Yu-Sheng
Lin, Chia-Hong
Kuo, James B.
Su, Ke-Wei
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (06) : 1373 - 1378
[2] Performance and reliability of sub-100nm TaSiN metal gate fully-depleted SOI devices with high-K (HfO2) gate dielectric
Thean, AVY
Vandooren, A
Kalpat, S
Du, Y
To, I
Hughes, J
Stephens, T
Goolsby, B
White, T
Barr, A
Mathew, L
Huang, M
Egley, S
Zavala, M
Eades, D
Sphabmixay, K
Schaeffer, J
Triyoso, D
Rossow, M
Roan, D
Pham, D
Rai, R
Murphy, S
Nguyen, BY
White, BE
Duvallet, A
Dao, T
Mogab, J
2004 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2004, : 106 - 107
[3] Capacitance behavior of nanometer FD SOICMOS devices with HfO2 high-K gate dielectric considering gate tunneling leakage current
Kuo, J. B.
Lin, C. H.
2006 25TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, VOLS 1 AND 2, PROCEEDINGS, 2006, : 61 - +
[4] Mixed-signal performance of Sub-100nm fully-depleted SOI devices with metal gate, high K (HfO2) dielectric and elevated Source/Drain extensions.
Vandooren, A
Thean, AVY
Du, Y
To, I
Hughes, J
Stephens, T
Huang, M
Egley, S
Zavala, M
Sphabmixay, K
Barr, A
White, T
Samavedam, S
Mathew, L
Schaeffer, J
Triyoso, D
Rossow, M
Roan, D
Pham, D
Rai, R
Nguyen, BY
White, B
Orlowski, M
Duvallet, A
Dao, T
Mogab, J
2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, 2003, : 975 - 977
[5] Ultra-thin body fully-depleted SOI devices with metal gate (TaSiN) gate, high K (HfO2) dielectric and elevated source/drain extensions.
Vandooren, A
Egley, S
Zavala, M
Franke, A
Barr, A
White, T
Samavedam, S
Mathew, L
Schaeffer, J
Pham, D
Conner, J
Dakshina-Murthy, S
Nguyen, BY
White, B
Orlowski, M
Mogab, J
2002 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2002, : 205 - 206

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