Checking for Electrical Level Security Threats in Bitstreams for Multi-Tenant FPGAs

被引:15
作者
Gnad, Dennis R. E. [1 ]
Rapp, Sascha [1 ]
Krautter, Jonas [1 ]
Tahoori, Mehdi B. [1 ]
机构
[1] Karlsruhe Inst Technol, Inst Comp Engn, Karlsruhe, Germany
来源
2018 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT 2018) | 2018年
关键词
D O I
10.1109/FPT.2018.00055
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Multi-tenant FPGAs, in which 3rd parties have partial access to the FPGA fabric, are a rising usage trend in cloud and reconfigurable SoCs. This gives rise to new types of attacks in FPGAs, as shown in recent studies. These attacks can operate on the electrical level through the common power delivery network, making them very hard to isolate. Thus, software-controlled FPGA configuration can be exploited to insert hardware trojans, impacting the security of the entire system. The attacks can be separated into fault and side-channel attacks to either actively manipulate a system or quietly extract secret information. In this paper, we show the first attempt of countermeasures against these voltage fluctuation based attacks, by analyzing FPGA bitstreams for malicious logic, basically implementing an FPGA antivirus. We provide a way to check bitstreams for potentially malicious structures, by extending a combination of commercial and opensource tools.
引用
收藏
页码:289 / 292
页数:4
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