Digital Estimation and Calibration Algorithm for 2-order Nonlinearity Mismatch in Time-Interleaved Sampling System

被引:0
作者
Wang, Yinan [1 ]
Xu, Hui [1 ]
Wang, Xi [1 ]
Sun, Zhaolin [1 ]
机构
[1] Natl Univ Def Technol, Coll Elect Sci & Engn, Dept Circuit & Syst, Changsha 410073, Hunan, Peoples R China
来源
2015 38TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP) | 2015年
关键词
Channel mismatches; digital calibration; digital estimation; nonlinearity mismatch; time-interleaved analog-to-digital converters; RECONSTRUCTION; ERRORS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Channel mismatches in time-interleaved sampling system would result in a significant decline in dynamic performance. Nonlinearity mismatch, as one kind of the channel mismatches, has not been widely investigated. In this paper, we present and evaluate the digital estimation and compensation method for the 2-order nonlinearity mismatch in an M-channel time-interleaved analog-to-digital converters (TIADC). Simulation results demonstrate that the foreground estimation method can perform fine accuracy. By employing adders and multipliers, the digital calibration method can bring a great improvement in the dynamic performance of TIADC.
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页数:5
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共 46 条
[1]   Digital Calibration for Gain, Time Skew, and Bandwidth Mismatch in Under-Sampling Time-Interleaved System [J].
Hu, Min ;
Yi, Pengxing .
APPLIED SCIENCES-BASEL, 2022, 12 (21)
[2]   A Digital Timing Mismatch Calibration Technique in Time-Interleaved ADCs [J].
Li, Jing ;
Wu, Shuangyi ;
Liu, Yang ;
Ning, Ning ;
Yu, Qi .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61 (07) :486-490
[3]   Digital background calibration algorithm and its FPGA implementation for timing mismatch correction of time-interleaved ADC [J].
Abbaszadeh, Asgar ;
Aghdam, Esmaeil N. ;
Rosado-Munoz, Alfredo .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2019, 99 (02) :299-310
[4]   Low complexity digital background calibration algorithm for the correction of timing mismatch in time-interleaved ADCs [J].
Abbaszadeh, Asgar ;
Aghdam, Esmaeil Najafi ;
Rosado-Munoz, Alfredo .
MICROELECTRONICS JOURNAL, 2019, 83 :117-125
[5]   Digital estimation and compensation method for nonlinearity mismatches in time-interleaved analog-to-digital converters [J].
Wang, Yinan ;
Xu, Hui ;
Johansson, Hakan ;
Sun, Zhaolin ;
Wikner, J. Jacob .
DIGITAL SIGNAL PROCESSING, 2015, 41 :130-141
[6]   Adaptive and Digital Blind Calibration of Transfer Function Mismatch in Time-Interleaved ADCs [J].
De Teyou, Gael Kamdem ;
Petit, Herve ;
Loumeau, Patrick .
2015 IEEE 13TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS), 2015,
[7]   Subsampling Models of Bandwidth Mismatch for Time-Interleaved Converter Calibration [J].
Monsurro, Pietro ;
Trifiletti, Alessandro .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2015, 62 (10) :957-961
[8]   Frequency response mismatch calibration in 2-channel time-interleaved oscilloscopes [J].
Pan, Zhixiang ;
Ye, Peng ;
Yang, Kuojun ;
Gao, Jian ;
Huang, Wuhuang ;
Zhao, Yu .
REVIEW OF SCIENTIFIC INSTRUMENTS, 2021, 92 (06)
[9]   All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters [J].
Chen, Shuai ;
Wang, Luke ;
Zhang, Hong ;
Murugesu, Rosanah ;
Dunwell, Dustin ;
Carusone, Anthony Chan .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 25 (09) :2552-2560
[10]   Frequency Response Mismatch Calibration in Generalized Time-Interleaved Systems [J].
Pan, Zhixiang ;
Ye, Peng ;
Yang, Kuojun ;
Huang, Wuhuang ;
Zhao, Yu .
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2022, 71