System-level co-design methodology based on platform design flow for system-on-chip

被引:0
|
作者
Wen, Quan [1 ]
机构
[1] SE Univ, Dept Management Engn, Nanjing 210096, Peoples R China
[2] N Univ Minorities, Dept Comp Engn, Yinchuan 750021, Peoples R China
关键词
co-design; platform-based design; system level reuse; system-on-chip;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Synthesis methods are important elements in platform-based design methodologies. This paper addresses platform-based design for system-on-chip (SoC). It takes hardware/software co-design and high level design reuse as keys to SoCs design. Particularly, it uses existing designs as starting points for new system implementations and put more stress on system level reuse. First, it introduces a. system level co-exploration methodology and analyzes a typical platform-based design flow. Then it gives performance analysis and proposes a revised platform-based design flow. To support design technology innovations, several synthesis issues are discussed, such as platform reuse and configurable architecture. It also presents market-oriented views and introduces synthesis tools to support the co-design methodology.
引用
收藏
页码:246 / 249
页数:4
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