Evolution of silicon surface morphology during H-2 annealing in a rapid thermal chemical vapor deposition system

被引：11
|
作者：
Wang, CL
Unnikrishnan, S
Kim, BY
Kwong, DL
Tasch, AF
机构：
[1] Microelectronics Research Center, University of Texas at Austin, Austin
来源：
APPLIED PHYSICS LETTERS | 1996年 / 68卷 / 01期
关键词：
D O I：
10.1063/1.116771
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
The surface morphology of Ct Si(100) after H-2 bake has been investigated. It is found that at temperatures as low as 950 degrees C, and bake times as short as 25 s, steps and terraces are formed by the H-2 annealing. The evolution of the step and terrace structure can be clearly seen by virtue of temperature differences across the wafer. The steps are two-atomic layer steps at straight edges, whereas one-atomic layer steps occur when the edge line is irregular. (C) 1996 American Institute of Physics.
引用
收藏
页码：108 / 110
页数：3
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