1000-v 9.1-mΩ • cm2 normally off 4H-SiC lateral RESURF JFET for power integrated circuit applications

A 4H-SiC normally off vertical channel lateral reduced-surface electric-field (RESURF) junction field-effect transistor (JFET) with a blocking voltage V-br of 1028 V and a specific on-resistance Ron-sp of 9.1 m Omega center dot cm(2) has been experimentally demonstrated. The device has a V-br(2)/Ron-sp figure-of-merit of 116 MW/cm(2), which is the highest value achieved to date on a 4H-SiC lateral power transistor. Also reported is a larger JFET that is capable of handling over 0.5-A current on an active area of 4.01 x 10(-3) cm(2). The fabricated double-RESURF devices have a vertical channel length of 1.8 mu m, created by tilted aluminum (Al) implantation on the sidewalls; of deep trenches, and a lateral drift-region length of 7.5 mu m. In addition, low-voltage logic-inverter circuits based on the same lateral JFET process have been monolithically integrated on the same chip. Proper logic-inverter function has also been demonstrated.